This invention relates to a liquid crystal display device, specifically to a liquid crystal display device in which an alignment direction of liquid crystal molecules is controlled by a lateral electric field generated between a pixel electrode and a common electrode.
As a way to achieve a wide viewing angle of the liquid crystal display device, a method has been developed to realize a light switching function by rotating the liquid crystal molecules in a plane parallel to a substrate with a lateral electric field generated between the electrodes on the same substrate. In-Plane Switching (hereafter referred to as IPS) technology and Fringe-Field Switching (hereafter referred to as FFS) technology, which is an improved IPS technology, are known as examples of these technologies.
A manufacturing process of the liquid crystal display device according to the FFS technology will be explained referring to the drawings. FIGS. 18A through 20B show the manufacturing process of one pixel in the liquid crystal display device according to the FFS technology. FIGS. 18A, 19A and 20A are plan views of a part of a display region in the liquid crystal display device. Each of FIGS. 18B, 19B and 20B is a cross-sectional view showing a section A-A in each of FIGS. 18A, 19A and 20A, respectively. Although a large number of pixels are disposed in a matrix form in the display region in the actual liquid crystal display device, only three pixels are shown in each of the plan views.
A buffer layer 11, which is made of a silicon dioxide (SiO2) film or a silicon nitride (SiNx) film, and an amorphous silicon layer are successively formed by CVD (Chemical Vapor Deposition) on a TFT substrate 10, which is made of a glass substrate or the like, as shown in FIG. 18B. The amorphous silicon layer is crystallized and transformed into a polysilicon layer by excimer laser annealing. The polysilicon layer is patterned to form a U-shaped active layer 12 of a thin film transistor 1 (hereafter referred to as TFT 1).
After that, a gate insulation film 13 is formed to cover the active layer 12. A gate line 14 made of chromium, molybdenum or the like is formed on the gate insulation film 13 overlapping the active layer 12. The gate line 14 extends in a row direction, and intersects the active layer 12 at two locations. A gate signal that controls turning on/off of the TFT 1 is applied to the gate line 14. On the other hand, an auxiliary common electrode line 15, that is made of the same material as the gate line 14 and is for providing a common electric potential Vcom, is formed parallel to the gate line 14.
Next, there is formed an interlayer insulation film 16 that covers the TFT 1 and the auxiliary common electrode line 15. And contact holes CH1 and CH2, which expose a source region 12s and a drain region 12d in the active layer 12, respectively, are formed in the interlayer insulation film 16. Also, a contact hole CH3, that exposes the auxiliary common electrode line 15, is formed in the interlayer insulation film 16.
There are formed a source electrode 17 that is connected with the source region 12s through the contact hole CH1, a display signal line 18 that is connected with the drain region 12d through the contact hole CH2, and a pad electrode 19 that is connected with the auxiliary common electrode line 15 through the contact hole CH3. The source electrode 17, the display signal line 18 and the pad electrode 19 are made of metal including aluminum or aluminum alloy or the like. Next, a planarization film 20 is formed over the entire surface. Contact holes CH4 and CH5, that expose the source electrode 17 and the pad electrode 19 respectively, are formed in the planarization film 20.
And there is formed a pixel electrode 21 that is connected with the source electrode 17 through the contact hole CH4 and extends over the planarization film 20, as shown in FIGS. 19A and 19B. The pixel electrode 21 is made of a first layer transparent electrode such as ITO (Indium Tin Oxide), and is applied a display signal Vsig from the display signal line 18 through the TFT 1.
After that, an insulation film 22 is formed to cover the pixel electrode 21, as shown in FIG. 20B. A contact hole CH6, that exposes the pad electrode 19, is formed by etching the insulation film 22. A common electrode 23, that has a plurality of slits S, is formed on the pixel electrode 21 through the insulation film 22. The common electrode 23 is made of a second layer transparent electrode such as ITO, and is connected with the pad electrode 19 through the contact hole CH6.
A counter substrate 30 made of a glass substrate or the like is disposed facing the TFT substrate 10. A polarizing plate 31 is attached to the counter substrate 30. Also, a polarizing plate 32 is attached to a back surface of the TFT substrate 10. The polarizing plates 31 and 32 are disposed in a way that their polarization axes are perpendicular to each other. A liquid crystal 40 is sealed-in between the TFT substrate 10 and the counter substrate 30.
In the liquid crystal display device described above, an average alignment direction (hereafter simply referred to as “alignment direction”) of major axes of the liquid crystal molecules of the liquid crystal 40 is parallel to the polarization axis of the polarizing plate 32 when a display voltage is not applied to the pixel electrode 21 (no voltage state). In this case, linearly polarized light passing through the liquid crystal 40 does not go through the polarizing plate 31 because its polarization axis is perpendicular to the polarization axis of the polarizing plate 31. That is, black is displayed.
When the display voltage is applied to the pixel electrode 21, on the other hand, there is generated a lateral electric field from the pixel electrode 21 toward the common electrode 23 through the slits S. The electric field is perpendicular to a longitudinal direction of the slits S on the plan view, and the liquid crystal molecules are rotated along a line of electric force of the electric field. At that time, the linearly polarized incident light to the liquid crystal 40 is turned into elliptically polarized light by birefringence to have a component of linearly polarized light that passes through the polarizing plate 31. In this case, white is displayed. The liquid crystal display device according to the FFS technology is disclosed in Japanese Patent Application Publication Nos. 2001-183685 and 2002-296611.
In general, when the common electrode 23 is insufficiently provided with the common electric potential Vcom because of an influence of electric resistance, the voltage applied to the liquid crystal 40 is reduced to cause degradation in quality of display such as reduced contrast. Since the common electrode 23 is formed of the transparent electrode such as ITO that has higher sheet resistivity than ordinary metal, the degradation in the quality of display is prone to be caused. This problem becomes evident particularly as a panel size of the liquid crystal display device becomes larger. Therefore, in order to provide the common electrode 23 with the common electric potential Vcom sufficiently, the auxiliary common electrode line 15 that supplies the common electric potential Vcom is disposed within the display region and the auxiliary common electrode line 15 is connected with the common electrode 23 in each of the pixels in the conventional liquid crystal display device.
When the auxiliary common electrode line 15 is disposed within the display region, however, there is a problem that its wiring portion makes a light-shielding region to reduce an aperture ratio of the pixels. This invention is directed to offer a liquid crystal display device capable of securely providing the common electrode with the common electric potential sufficiently and improving the aperture ratio of the pixels to obtain a bright display.